Hex Five Blog

Examining the Top Five Fallacies About RISC-V

By David Patterson , Pardee Professor of Computer Science, Emeritus, at UC Berkeley, vice chair of the RISC-V International Board of Directors and Hex Five Advisor.
EETimes (December 13, 2022)

In a little over a decade, RISC-V has arguably become at least the third most important instruction set architecture (ISA) for future applications of computing. In the next few years, it may become just as surprising to pick a proprietary ISA over the open RISC-V for a new project as it would be to pick a closed alternative to Ethernet or USB.

My colleagues at UC Berkeley and I predict that by the end of this decade, the dominant ISA for future product development will be the open RISC-V architecture. Companies around the world are already designing with RISC-V and the momentum is rapidly increasing, so this is a good time for the industry to take a closer look at RISC-V and examine some fallacies about it.

Lessons from U.S. National Security and the Cyber Security Industry that Can Benefit You

April 29, 2021

Tiedemann Advisors Speaker Series

Cybersecurity: What You Need to Know and Do to Protect Yourself and Your Business

Cybersecurity has never been more important than it is today. Every risk management strategy for a family or business must now have a comprehensive plan to address the substantial threat of cyberattacks. It is no longer a question of if you might be threatened by a cybersecurity attack but rather when. While the threats are increasing, so too are the ways in which you can protect yourself and your business.

Securing In-Cabin AI using MultiZone TEE on a Secure FPGA SoC>

Juy 28, 2020

This post appeared on All About Circuits discusses trusted execution environments — already used in a variety of connected devices — by showing how using TEE and an FPGA SoC can work in vehicle in-cabin AI.

Part I to this article, Trusted Execution Environments (TEEs) in Connected Cars, discussed that while a Trusted Execution Environment (TEE) is widely used on mobile phones and other connected devices to secure critical functions, adoption in connected vehicles is low. The lack of TEE can create system vulnerabilities. In Part II we will take in-cabin AI as an example application, and discuss how a modern TEE and FPGA SoC can be its secure platform.

Strengthening the Internet of Things with RISC-V

June 3, 2020

Embedded applications require a layered security approach. Security through separation is essential, as it shields critical functionality from the attack surface introduced by untrusted large code base software. The days of proprietary, overly complicated, hardware-heavy TEEs are over as this legacy approach has proven inadequate to meet cost and agility requirements of modern IoT applications. Hex Five’s MultiZone Security offers a quick and safe way to add security and separation to RISC-V applications. MultiZone is based on RISC-V standards and can retrofit existing designs: you can take advantage of high security separation without the need for hardware and software redesign, eliminating the complexity associated with managing a hybrid hardware/software security scheme.

June 1, 2020

At Hex Five, we’re focused on finding ways to improve our products and provide a better customer experience. We want to help you build out a proof of concept that works for your business. The Hex Five Early Adopter Program (EAP) provides MultiZone® Security license at no cost and a number of engineering hours at an heavily discounted rate.

* Program available for a limited time.

March 31, 2020

View a 10 minute demo of software-defined, hardware-enforced MultiZone security on resource-constraint Andes Corvette board. MultiZone enables three equally secure zones fully responsive and separated from each other.

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Hex Five Video Interview @ RISC-V Summit 2019

December 12, 2019

Prof. Sandro Pinto explains the Hex Five Security demo at the show and the concept of hardware-enforced software-defined separation at the core of MultiZone Security.

Many thanks to Joseph Jacks of OSS Capital for shooting the clip!

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Exploring Enclaves

August 4, 2019

July 25 was a gorgeous summer day. It’s also when the Keystone Enclave team hosted the 2019 Open-Source Enclave Workshop at University of California, Berkeley. Industry and academic luminaries representing 23 organizations gathered at Wozniak Lounge, Soda Hall to deliver 25 talks.

Keystone Enclave is an open-source project for building trusted execution environments (TEE) with secure hardware enclaves, based on the RISC-V architecture. Its goal is to build an open-source secure hardware enclave, accessible to everyone in industry and academia.

July 6, 2019

At the Zurich RISC-V Workshop in June, Professor Sandro Pinto and his team at Universidade do Minho, Portugal, presented their work that describes the first fully functional framework for developing secure Internet-of-Things (IoT) systems on RISC-V processors. The proposed horizontal software stack is based exclusively on a number of open-source, commercial-grade technologies readily available today.

Nov 15, 2018

In our engagements with partners, customers and investors, we frequently get asked – “Why RISC-V?” Wouldn’t it make more sense to build a simple Trusted Execution Environment for a larger installed base like ARM or x86?

Here’s why we believe in RISC-V